A Review of High-Latency Optimization in Privacy-Preserving Computation: Hardware-Algorithm Co-Design, Hierarchical Protection, and Scenario-Aware Deployment

Abstract

With the continuous expansion of data circulation, federated learning, and privacy-preserving machine learning, cross-institutional and cross-device collaborative data analysis imposes increasingly stringent requirements on security and real-time performance. Existing studies show that the main bottleneck of privacy-preserving computation is not merely the slow execution of a single cryptographic operator, but the combined effect of ciphertext computation complexity, protocol interaction costs, and system-level data movement overhead. Accordingly, this paper reviews high-latency optimization for privacy-preserving computation along the thread of latency sources, optimization paths, and scenario adaptation. It compares representative methods in terms of applicable objects, performance gains, implementation costs, and deployment boundaries, and summarizes the problem as three structural contradictions: hardware rigidity, algorithmic inefficiency, and static protection strategies. On this basis, the paper surveys heterogeneous hardware acceleration, model redesign and compression, selective and hierarchical protection, and cloud-edge-terminal collaborative deployment. The literature indicates that graphics processing units (GPUs), field-programmable gate arrays (FPGAs), and application-specific integrated circuits (ASICs) provide important acceleration support for critical paths such as number theoretic transform (NTT), key switching, and bootstrapping; quantization, pruning, ciphertext packing, and gradient compression can reduce redundant computation and communication; and selective encryption, hybrid privacy mechanisms, and dynamic privacy-budget allocation help concentrate limited resources on highly sensitive objects. Overall, future optimization of privacy-preserving computation should not remain at isolated attempts to make a single operator faster. Instead, it should move toward cross-layer collaborative frameworks that account for scenarios, hardware platforms, and privacy mechanisms, thereby promoting privacy-preserving computation from theoretical feasibility toward engineering usability.